Photonic integrated circuits needs standardisation is message from EPIC workshop

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Greater standardisation is needed to make photonic integrated circuits (PICs) more cost-effective, according to Carlos Lee, director general of EPIC, reporting from a workshop on PICs

Standardisation and set design rules are desperately needed to advance the technology surrounding photonic integrated circuits (PICs), were the views of a number of delegates at a workshop organised by the European Photonics Industry Consortium (EPIC). The workshop on PICs took place from 18-19 June at TE Connectivity in 's-Hertogenbosch, The Netherlands, (the workshop was the second EPIC has held on PICs in the last six months, the previous taking place at IBM Research in Zurich in December 2013).

During the two days at TE Connectivity, Bert Offrein at IBM Research noted that assembly is a big part of the cost of interfacing optical links – 30-50 per cent, he said – as there are many solutions, but only a limited availability of standard options. It was proposed that moving to chip-level assembly and board-level interconnects could be the most effective way to develop the products.

From comments in response to Offrein’s talk, it was noted that a number of companies are now avoiding integration and keeping opto parts and electro parts separately packaged because of the thermal issues with linking them.

Torsten Vahrenkamp at FiconTec, which manufactures automated production test equipment, commented that, as an equipment maker, the requirements for standards are very different. Active and passive alignment is generally customised for each application and therefore affects machine design. Standardised parts (sizes, shapes, etc) would make the machine design easier and therefore lower the cost. A standard type of machine could then be adopted by multiple different companies rather than just an ‘in-company standard’ being the only option.

Many companies are still using ‘old’ machinery due to a lack of market growth preventing investment in newer capabilities. It was noted that the customisation to suit each different device is around a factor of 50 per cent of the cost of a machine. A range of standard packages and chip sizes could remove most of the customisation needed.

It was considered that EPIC companies should review these non-standard needs together and settle on shared industry acceptable options (standards) that would not affect individual IPs.

There has been little new in the last 10 years in terms of laser packaging, it was noted during a presentation by Bob Musk, CEO of Entropix, and it was considered that maybe photonics does not yet have the volume to drive the need for cost-effective packages. Perhaps the switch to non-hermetic approaches may be one of the solutions, it was suggested.

From the many comments during Musk’s talk it was suggested that a fundamental change should be to design optochips to suit packaging, rather than designing packages to fit optochip needs. Musk is working on an EU project called PARADIGM – standing for photonic advanced research and development for integrated generic manufacturing – looking at designing the optochip to fit a package. The approach uses an interposer into a customised HTCC package option. Musk proposed that the package becomes a generic standard. He noted that the package cost is around €50,000 for tooling cost and a €40-50 unit cost at 10,000 per year volumes. The interposer allows low cost customisation to match different PIC options to the package.

Stéphane Bernabe at CEA-Leti reviewed the development of packaging options for PICs that aim to get to a smaller package outline. CEA-Leti also has a 3D packaging capability, which uses a photonic interposer to achieve high integration onto BGA-type substrates. The challenges of optical coupling showed that there is now a need for the development of optimised assembly equipment to be able to achieve the required alignment accuracies.

One of the comments from the audience was that the issue of environmental testing (reliability, etc) of such packages is likely to be an issue. The conditions for testing need to be defined and standardised. In addition, the effect of next-stage assembly (soldering, installation to boards, etc) is likely to become a significant issue. It was also noted that areas such as data centres do not have the same criteria as other markets such as automotive. Additionally, the long term reliability requirement is coming down from 25 years to five years, due to the need to keep up with developing technologies.

Other projects discussed during the workshop included PhoxTroT, which covers optical circuit board developments, HDP-UG, an optical interconnect measurement project, and PHASTFLEX, photonic hybrid assembly through flexible waveguides, a Framework 7 programme. 

There was much more discussion about photonic integrated circuits during the workshop. One of the suggestions for EPIC was that the organisation should create a library of the typical standards for PIC packaging that could become a reference for the industry. An EPIC membership survey was also proposed to see what the commonality is for photonic components, what the envisaged market sizes are, and what standards companies consider are necessary.