Pooling technology to advance photonic integrated circuits

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Combining the various technologies involved in developing photonic integrated circuits is one way of furthering integrated photonics. This is according to Bert Offrein, manager photonics, and Jens Hofrichter, a postdoc, both at IBM Research in Zurich, who report from EPIC's workshop on photonic integrated circuits 

On 5-6 December 2013, a workshop organised by EPIC (European Photonics Industry Consortium) took place under the title: ‘Meet or eat? Collaboration and/or competition in photonic integrated circuits’. The event was hosted by IBM Research in Rüschlikon, close to Zurich, in Switzerland. More than 80 participants, mostly from industry, discussed the current status and challenges in integrated photonics. Even in the 90s, so almost 20 years ago, integrated photonics received a lot of attention and was deemed a potential technology to solve the challenges in meeting the demand for increased bandwidth in telecommunications. With the burst of the telecom bubble early in the 2000s, a substantial part of the emerging technology vanished. However, some integration technologies are reappearing, the most important ones being silicon photonics, III-V photonics and dielectric waveguide technology. And combinations of these technologies seem to become increasingly important. 

Silicon photonics is a good example. It is viewed as the ideal platform to take advantage of the mature infrastructure present in the CMOS industry, to combine electronics with photonics, and to scale up production at low cost. But what about the III-V semiconductor-based photonic platforms? And how will this technology be integrated in a system? Would it be better to combine the glass, III-V and silicon integrated optic technologies into one platform?

Clearly, despite all the integration efforts, the photonics industry is far from the level of integration and standardised assembly known in electronics production. Complex electrical chips are interconnected at system level through thousands of signals applying just a few assembly steps. Why is it so hard to make even relatively simple integrated optic devices successful, such as fibre-to-the-home (FTTH) transceivers? The volume is there, as is the enabling technology like indium phosphide. The labour cost of a hybrid-assembled FTTH transceiver is negligible and its performance is hard to beat. New technologies have to make a difference and the customer only cares about performance and cost. Coherent receivers are a positive example in this respect; the integrated solution provides stability and therefore a performance advantage.

At the workshop, three integrated optic platforms were discussed in more detail: silicon photonics, III-V materials (especially indium phosphide), and glass on silicon (silica/PLC) and silicon nitride or TripleX. All have their specific advantages, and combining them could bring a solution to bridge deficiencies. Glass waveguides can be used for ultra-low loss optical delay lines. Silicon's best advantage was recognised to be its compactness and theoretical compatibility with CMOS electronics. Additionally, the hybrid or heterogeneous integration of III-V on silicon has been investigated extensively with the goal to integrate lasers into a silicon photonics chip. While several integration models may be viable, it is clear that a combination of materials is required to gather all necessary electrical and optical functions in one platform. The other extreme is that everything is done in silicon except for those functions where silicon cannot deliver.

Another question that was addressed is whether it is better to use die-level hybrid integration of III-V chips with silicon chips or rather bonding-based heterogeneous integration of III-V thin films onto silicon. While the potential opportunities of the heterogeneous integration were recognised in terms of cost or performance, most experts emphasised that the industrial challenges to develop the industrial supply chain for this approach are still considerable.

Device testing is an important aspect of establishing and optimising integrated optic technologies. Optical and electro-optical characterisation is time consuming. Hence, it is an important cost aspect and may even limit the production capability, even more than the throughput of the wafer processing tools. Besides device testing, the packaging is also a dominant factor in the overall product cost. As all integrated optic platforms have a need for a packaging solution, the ideal solutions would be to think of a common approach benefiting them all. Standardisation is an important aspect to drive such a development, and EPIC could play a role here.

While all participants agreed that packaging is an important issue requiring new low cost and scalable solutions, opinions varied on the approaches to be pursued. Passive or visual alignment approaches appear simpler as one does not have to ‘power’ the components to be aligned. But active alignment relaxes the accuracy requirements of the components and could lead to better results.

As a consequence of this discussion, it was proposed to devote the next workshop to test, assembly and packaging.