First silicon photonics AI network reliability standard set by JEDEC
"DUV lithography involves processing silicon technologies on multiple prototyping chips with up to 200mm-sized wafers," says Emre Kaplan from Cornerstone, "and [you] can pattern them all instantly, so it’s really good for scalability (Image: Cornerstone)
The new JESD264 standard sets new qualification and reliability requirements the emerging silicon photonics market
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