Being able to engineer integrated circuits with higher transistor counts involves printing smaller structures. Photolithography, used in silicon chip fabrication, employs a variety of optical trickery to reduce the size of printed features, as Greg Blackman finds out
The semiconductor industry has grown from its origins in the 1960s to the multi billion dollar industry of today, with silicon chips found virtually everywhere in modern society. The birth of the integrated circuit (IC) – a miniature electronic circuit made up of a number of transistors integrated onto a semiconductor substrate – revolutionised the electronics industry and since then, improvements in fabrication methods have allowed smaller chips to be made incorporating greater numbers of transistors.
The invention of the integrated circuit is generally credited to both Jack Kilby of Texas Instruments and Robert Noyce of Fairchild Semiconductor working independently, with Kilby demonstrating his chip in 1958 and Noyce a short while later. Noyce went on to cofound Intel in 1968 with Gordon Moore, whose prediction, referred to as Moore’s Law, that the number of transistors on a chip will double every two years, is still relevant today.
Advances in processing speed and memory capacity of silicon chips are a result of being able to fabricate smaller structures and therefore of fitting more transistors onto a chip (as described by Moore’s Law). The most advanced logic chips currently in production contain structures as small as 45nm and to continue advances in chip speed, there is a requirement for even smaller structure sizes on logic and memory chips. This reduction in feature size is due, largely, to improvements in photolithography, the optical printing technique used in microfabrication of silicon chips.
Semiconductor chips are built up of different layers, each fabricated by photolithography. Here, light is used to transfer a pattern from a photomask to a light-sensitive chemical photoresist on a semiconductor wafer. The pattern is then etched out of the wafer substrate and doped with different metal impurities to define the circuit elements.
Currently, excimer lasers operating at 193nm are used in photolithography. ‘As structure sizes decreased over time, mask features have reduced in size and the exposure wavelength has become shorter, (currently at 193nm),’ explains Dr Ralph Delmdahl, product marketing manager at Coherent. ‘Also, the mask architecture has changed from binary, in which masks are composed of either transmissive or non-transmissive areas to provide the pattern, to phase shift masks (PSMs), which use optical techniques to help focus the light in specific areas.’ Coherent provides laser technology, including excimer lasers for deep UV lithography at 193nm.
Binary vs phase shift masks
To reduce structure size on silicon chips, there are three parameters within photolithography that can be addressed: the wavelength, which is currently at 193nm and which cannot be easily changed; the numerical aperture, which is defined by the wafer stepper; or the process constant, of which the mask is a factor.
From a physical standpoint, it is generally not considered possible to print with a resolution much smaller than the wavelength of the light and as feature sizes on binary masks decreased, the non-transmissive areas (composed of a chrome layer on quartz) began to act like a diffraction grating. Therefore, even if the required feature sizes can be produced on a binary mask, they are not resolved when imaged onto the chip, because of the diffraction limitation.
To combat this, phase shift masks have been developed that use optical techniques to shift the phase of the light and induce interference. By inducing negative interference, for instance, the light intensity can be reduced to zero on dark areas, which allows a mask profile to be optically sharpened. ‘The mask is no longer a passive object, but it interacts with the light to create structures on silicon chips,’ remarks Delmdahl.
PSMs don’t contain simply transmissive or non-transmissive areas, but areas with larger or smaller optical path lengths. Molybdenum silicide is used instead of chrome, which has a transmission of less than 10 per cent and therefore doesn’t affect the wafer, but it shifts the phase of the light passing through the portion by 180°. The light passing through this portion therefore negatively interferes with neighbouring areas where the phase is not shifted to sharpen the intensity profiles.
Phase shift masks can either use a low transmissive material, such as molybdenum silicide, to generate the interference (attenuated PSMs), or the transmissive quartz layer can be etched to different depths, which produce different phase shift effects (alternating PSMs).
A typical integrated circuit consists of 30-40 layers or structuring steps of different sizes. For the larger structures, binary masks are still used, while PSMs are used to create the smaller and more critical layers.
Qualifying defects on PSMs requires specialised measuring equipment. Compared to conventional binary masks, measuring phase shift masks is more complicated because, firstly, PSMs are used for very small feature sizes and, secondly, the phase behaviour of the light must be considered.
The image created not only depends on the arrangement of the structures, but also on the way light is projected onto the mask, the socalled 3D effects of the mask. The numerical aperture of the lens system illuminating the mask, the wavelength of light, and the angle of the light (off-axis illumination will often be used with PSMs) will all contribute to the dark/light pattern on the wafer. ‘The pattern on the mask is only partly responsible for what prints onto the wafer,’ explains Delmdahl. ‘Therefore, it’s not so much seeing what structures or defects are on the mask as seeing what prints that is important.’
The Phame system, produced by Carl Zeiss and using the IndyStar excimer laser from Coherent, is designed to emulate all of the parameters involved in lithographic production at 193nm for phase shift mask inspection.
PSM inspection systems must therefore emulate the stepper factors involved in the process. The Phame system, produced by Carl Zeiss and using the IndyStar excimer laser from Coherent, is designed to do this.
‘Excimer lasers used in the production of silicon chips are large and expensive pieces of machinery and cannot realistically be used for inspection purposes,’ says Delmdahl. The IndyStar is cheaper, approximately 10 per cent of the cost of a lithography production laser, but it still provides kilohertz repetition rates for rapid inspection (up to 1,000 illuminations per second) and high pulse stability over a long lifetime.
The Phame emulates the stepper system, but while the stepper demagnifies the mask features by a factor of four, the Phame magnifies the mask and the pattern is captured by a CCD sensor. ‘It’s not simply the enlarged features of the mask itself, but the enlarged phase image that would be projected onto the wafer that is captured,’ explains Delmdahl.
‘Masks used in lithography are becoming more complex with smaller feature sizes and are therefore more costly to produce,’ he continues. ‘In addition, up to 40 structure layers are printed onto the chip, with millions of individual structures, so the potential for printing defects is high. Therefore, silicon chip manufacturers require a robust inspection system, especially for PSMs.’
The Phame system is an integral part of photolithography, as photomasks are now more costly and have to be inspected more directly. The Phame system can emulate all of the parameters involved in lithographic production and allows real in-die structures, rather than reference features, to be measured. Alternative inspection techniques, such as AFMs or interferometers, are limited either to what structure sizes can be measured or, in the case of interferometers, many assumptions must be made about the numerical aperture and angle of light, etc, to simulate the outcome. Phame systems therefore provide the most direct method of measuring the phase behaviour of PSMs.
Dr Tanja Bizjak, solutions manager at Limo Lissotschenko Mikrooptik, feels that trends in optical lithography have shifted from creating better projection optics and wafer processing to improving the illumination. ‘Currently, more effort is put into improving illumination technology, such as in source mask optimisation,’ she says, (certain lithographic processes will employ source mask optimisation, in which the source is optimised according to the mask).
Limo, with headquarters in Dortmund, Germany, manufactures micro-optic arrays designed to provide a homogeneous angle intensity distribution for the light source used in deep UV lithography. Excimer lasers produce a multi-mode light source that does not have an even intensity distribution. For lithography, the beam must be as uniform as possible and this can be achieved using micro-lens arrays. Light with a homogeneous angle distribution, produced by the arrays, is then transformed into a homogeneous space distribution by a condenser lens to illuminate the mask.
The smallest feature on a chip using 193nm is currently 45nm, but there are plans to decrease this to 32nm. This will place greater importance on inspection techniques. However, in Delmdahl’s opinion: ‘32nm is at the limit of the smallest feature size that 193nm lithography can produce.’ Manufacturing smaller structures will require the move to extreme ultraviolet (EUV) (see panel), which has a shorter wavelength (13.5nm) allowing greater resolution.
Bizjak notes that until EUV or nanoimprint (a method of fabricating nanometer scale patterns) are viable lithographic techniques for the mass production of silicon chips, chip manufacturers aim to get the most from 193nm lithography techniques, which includes providing higher quality and more customised illumination.
One way to reduce structure sizes on silicon chips is to reduce the wavelength of light used for imaging. Lithography has moved from using UV lamps as an illumination source to excimer lasers at 193nm. Moving to extreme ultraviolet (EUV) shortens the wavelength by more than a factor of 10, from 193nm to 13.5nm. With this very short wavelength there is the potential to shrink the size of structures on silicon chips (currently at 45nm) even further without using optical tricks.
The Fraunhofer Institute for Laser Technology (ILT), in collaboration with Philips, has been working on improving the power and stability of the EUV light source to make it commercially viable. ASML, a manufacturer of lithography systems, has been running two full-field EUV lithography scanners, one in Leuven, Belgium at IMEC and the other in Albany at the College of Nanoscale Science and Engineering, both of which use ILT/Philips EUV lithography sources. Process development work on aspects such as power output and stability is being carried out at both of these sites. ‘The two systems are alpha demo tools, but are producing functional chips and are close to commercial standards,’ comments Dr Willi Neff, head of department of plasma technology at Fraunhofer ILT.
Plasma discharge used to produce extreme ultraviolet light. Image courtesy of Fraunhofer Institute for Laser Technology ILT, Aachen, Germany.
The two scanners are running, but throughput is low, with only a few wafers produced per hour. ‘Throughput needs to increase to 50-200 wafers per hour to be viable in a commercial setting,’ states Neff. Therefore, the efficiency of the system needs to be improved, especially at the source. Neff expects the next generation of EUV systems to have 10 times the power of the alpha systems and should be operational next year, with estimates suggesting the technology will be introduced commercially around 2012.
‘Manufacturing smaller and smaller structure sizes using conventional 193nm systems has become more expensive,’ says Neff. ‘Therefore, as soon as EUV technology becomes mature enough to be introduced into silicon chip fabrication, the expectation is that the cost of EUV systems will be lower for these small structures than conventional technology.’
The principle remains the same for EUV lithography as for other optical lithography techniques, but a different light source is used as well as different optical components to image the light. Lasers, or coherent light sources, are not powerful enough to act as a source in EUV lithography, so the light is produced via plasma by ionising tin at temperatures of approximately 200,000°C. There are two methods of generating EUV light: laser produced plasma (LPP) and discharge produced plasma (DPP). LPP uses a high-power CO² laser with greater than 10kW average pulse power to ionise tin droplets, whereas DPP uses a high, pulsed current to heat up and ionise tin.
In terms of the optical components, EUV cannot use transmitting optics, such as refractive lenses used in deep UV lithography, because the short wavelengths are blocked even with very thin materials. Therefore, EUV uses reflective optics and the system works under vacuum.
‘From the physics of the process, 10nm structure sizes are possible, although it might still require optical tricks to achieve this with EUV,’ explains Neff. ‘Whether or not the physical properties of silicon chips will continue to decrease to this size is another issue, but using 13.5nm light, structure sizes of 10nm are possible, with estimates suggesting structure sizes will reach these levels around 2015.’